Methods for determining optimum power supply voltages for radio-frequency power amplifier circuitry

ABSTRACT

Electronic devices with wireless communications capabilities are provided. The electronic device may include storage and processing circuitry, power amplifier circuitry, power supply circuitry, etc. The storage and processing circuitry may direct the power amplifier circuitry to operate using a desired gain mode, in a particular radio channel, and at a given output power level. The power supply circuitry may bias the power amplifier circuitry with a power supply voltage. The performance of the power amplifier circuitry may be characterized by an adjacent channel leakage ratio (ACLR) margin. The power consumption of the power amplifier circuitry may be characterized by a current savings ratio. A cost function may be calculated by taking the product of the ACLR margin and current savings ratio. A minimum point for each cost function curve may be determined. It is desirable to bias the power amplifier circuitry with a supply voltage corresponding to the minimum point.

BACKGROUND

This invention relates generally to wireless communications circuitry,and more particularly, to ways in which to optimize wirelesscommunications performance by making power amplifier bias adjustments.

Integrated circuits often have wireless communications circuitry thatincludes radio-frequency power amplifiers. Radio-frequency poweramplifiers are used to amplify radio-frequency signals for wirelesstransmission in a desired channel.

Radio-frequency power amplifiers typically exhibit reduced powerconsumption at lower supply voltages. Lowering the supply voltage thatbiases the power amplifiers directly decreases the supply current thatflows through the radio-frequency power amplifiers, thereby savingpower. Lowering the supply voltage, however, degrades power amplifierlinearity. Degrading power amplifier linearity in this way mayundesirably increase adjacent channel leakage ratio (e.g., the ratio ofout-of-channel power to in-channel power).

It would therefore be desirable to be able to provide a method fordetermining an optimum supply voltage level to bias the radio-frequencypower amplifiers to balance enhanced linearity with reduced powerconsumption.

SUMMARY

Electronic devices may include wireless communications circuitry. Thewireless communications circuitry may include storage and processingcircuitry, radio-frequency input-output circuits, radio-frequency poweramplifier circuitry, adjustable power supply circuitry, and otherwireless circuits.

The radio-frequency input-output circuits may feed signals to the poweramplifier circuitry. The power amplifier circuitry may amplify thesignals prior to wireless transmission. The power amplifier circuitrymay include multiple power amplifier stages. The storage and processingcircuitry may control these stages to place the power amplifiercircuitry in a desired gain mode. For example, the power amplifier maybe placed into a high gain mode by enabling all of the power amplifierstages or may be placed into a low gain mode by enabling one of thepower amplifier stages.

The storage and processing circuitry may bias the power amplifiercircuitry at a desired positive power supply voltage. The power supplyvoltage may be supplied to each of the power amplifier stages.Adjustments to amplifier bias may be made to ensure adequate performancewhile minimizing power consumption.

The performance of the power amplifier circuitry may be characterized bya metric such as an adjacent channel leakage ratio (ACLR). The adjacentchannel leakage ratio in a system is defined as the ratio ofout-of-channel power to in-channel power. A small adjacent channelleakage ratio value is indicative of good amplifier linearity. ACLRmargin may sometimes be used to quantify power amplifier circuitryperformance. ACLR margin may be calculated by subtracting a measuredACLR from a target ACLR. ACLR margin may generally rise as supplyvoltage increases, reflecting improved amplifier linearity at elevatedamplifier bias voltages.

During device characterization operations, the amount of supply currentused by the power amplifier circuitry may be measured. Supply currentwill generally rise as supply voltage increases. Lower supply currentsare desirable for lower power consumption. A current savings ratio maybe determined by subtracting the maximum supply current from measuredsupply current and then dividing that difference by the maximum supplycurrent. The maximum supply current is the maximum amount of currentthat is fed to the power amplifier circuitry when operating at itsmaximum supply voltage. A lower (i.e., more negative) current savingsratio may be desirable for improved power savings.

A cost function may be calculated by taking the product of the ACLRmargin and the current savings ratio. Each factor may be raised to adesired exponent to provide a suitable weighting scheme. For example,the ACLR margin may be squared to place emphasis on amplifier linearity.

An electronic device may be tested at each operating point (e.g., in adesired gain mode, output power level, supply voltage level, frequencyrange, etc.) to obtain a set of cost function characteristic curves.Test equipment may be used to determine the minimum point on each costfunction curve. The power supply voltage corresponding to the minimumpoint corresponds to an optimum supply voltage level for use by thedevice during normal operation. This optimum voltage biases the poweramplifier circuitry so as to provide a desired balance between amplifierlinearity and power consumption.

Further features of the present invention, its nature and variousadvantages will be more apparent from the accompanying drawings and thefollowing detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of an illustrative electronic device with wirelesscommunications circuitry in accordance with an embodiment of the presentinvention.

FIG. 2 is a graph showing how wireless circuitry performance and powersaving metrics may vary with supply voltage in accordance with anembodiment of the present invention.

FIG. 3 is a plot illustrating how the adjacent channel leakage ratio(ACLR) of radio-frequency power amplifier circuitry may vary with supplyvoltage in accordance with an embodiment of the present invention.

FIG. 4 is a graph illustrating how supply current flowing throughradio-frequency power amplifier circuitry may vary with supply voltagein accordance with an embodiment of the present invention.

FIG. 5 is a plot illustrating cost function characteristics forradio-frequency power amplifier circuitry at various operatingconditions in accordance with an embodiment of the present invention.

FIG. 6 is a diagram showing how multiple devices may be tested to obtaina table of optimized settings in accordance with an embodiment of thepresent invention.

FIG. 7 is a flow chart of illustrative steps involved in determiningoptimum supply voltage settings for biasing radio-frequency poweramplifier circuitry in accordance with an embodiment of the presentinvention.

DETAILED DESCRIPTION

This relates generally to wireless communications, and moreparticularly, to biasing wireless communications circuitry at optimumsupply voltage levels in wireless electronic devices.

The wireless electronic devices that are biased in this way may beportable electronic devices such as laptop computers or small portablecomputers of the type that are sometimes referred to as ultraportables.Portable electronic devices may also be somewhat smaller devices.

The wireless electronic devices may be, for example, cellulartelephones, media players with wireless communications capabilities,handheld computers (also sometimes called personal digital assistants),remote controllers, global positioning system (GPS) devices, andhandheld gaming devices. Wireless electronic devices such as these mayperform multiple functions. For example, a cellular telephone mayinclude media player functionality and may have the ability to rungames, email applications, web browsing applications, and othersoftware.

An illustrative electronic device that includes wireless communicationscircuitry is shown in FIG. 1. As shown in FIG. 1, device 10 may includeone or more antennas such as antennas (antenna structures) 34 and mayinclude radio-frequency (RF) input-output circuits 12. During signaltransmission operations, circuitry 12 may supply radio-frequency signalsthat are transmitted by antennas 34. During signal reception operations,circuitry 12 may accept radio-frequency signals that have been receivedby antennas 34.

The antenna structures and wireless communications circuitry of device10 may support communications over any suitable wireless communicationsbands. For example, the wireless communications circuitry may be used tocover communications frequency bands such as cellular telephone voiceand data bands at 850 MHz, 900 MHz, 1800 MHz, 1900 MHz, and thecommunications band at 2100 MHz band, the Wi-Fi® (IEEE 802.11) bands at2.4 GHz and 5.0 GHz (also sometimes referred to as wireless local areanetwork or WLAN bands), the Bluetooth® band at 2.4 GHz, and the globalpositioning system (GPS) band at 1575 MHz.

Device 10 can cover these communications bands and other suitablecommunications bands with proper configuration of the antenna structuresin the wireless communications circuitry. Any suitable antennastructures may be used in device 10. For example, device 10 may have oneantenna or may have multiple antennas. The antennas in device 10 mayeach be used to cover a single communications band or each antenna maycover multiple communications bands. If desired, one or more antennasmay cover a single band while one or more additional antennas are eachused to cover multiple bands.

Device 10 may include storage and processing circuitry such as storageand processing circuitry 16. Storage and processing circuitry 16 mayinclude one or more different types of storage such as hard disk drivestorage, nonvolatile memory (e.g., flash memory or otherelectrically-programmable-read-only memory), volatile memory (e.g.,static or dynamic random-access-memory), etc. Storage and processingcircuitry 16 may be used in controlling the operation of device 10.Processing circuitry in circuitry 16 may be based on processors such asmicroprocessors, microcontrollers, digital signal processors, dedicatedprocessing circuits, power management circuits, audio and video chips,radio-frequency transceiver processing circuits, radio-frequencyintegrated circuits of the type that are sometimes referred to asbaseband modules, and other suitable integrated circuits.

Storage and processing circuitry 16 may be used in implementing suitablecommunications protocols. Communications protocols that may beimplemented using storage and processing circuitry 16 include internetprotocols, wireless local area network protocols (e.g., IEEE 802.11protocols—sometimes referred to as Wi-Fi®), protocols for othershort-range wireless communications links such as the Bluetooth®protocol, protocols for handling 2G cellular telephone communicationsservices, 3G communications protocols, 4G communications protocols, etc.

Data signals that are to be transmitted by device 10 may be provided tobaseband module 18. Baseband module 18 may be implemented using a singleintegrated circuit (e.g., a baseband processor integrated circuit) orusing multiple integrated circuits.

Baseband processor 18 may receive signals to be transmitted over antenna34 over path 13 from storage and processing circuitry 16. Basebandprocessor 18 may provide signals that are to be transmitted totransmitter circuitry within RF transceiver circuitry 14. Thetransmitter circuitry may be coupled to radio-frequency power amplifiercircuitry 20 via transmit path 26. Path 13 may also carry controlsignals from storage and processing circuitry 16. These control signalsmay be used to control the power of the radio-frequency signals that thetransmitter circuitry within transceiver circuitry 14 supplies to theinput of power amplifiers 20 via path 26. This transmittedradio-frequency signal power level is sometimes referred to herein asPin, because it represents the input power to power amplifier circuitry20.

During data transmission, power amplifier circuitry 20 may boost theoutput power of transmitted signals to a sufficiently high level toensure adequate signal transmission. Circuitry 28 may contain aradio-frequency duplexer and other radio-frequency output stagecircuitry such as radio-frequency switches and passive elements.Switches may, if desired, be used to switch the wireless circuitrybetween a transmitting mode and a receiving mode. Duplex filter 28 maybe used to route input and output signals based on their frequency.

Matching circuitry 32 may include a network of passive components suchas resistors, inductors, and capacitors and ensures that antennastructures 34 are impedance matched to the rest of the wirelesscircuitry. Wireless signals that are received by antenna structures 34may be passed to receiver circuitry in transceiver circuitry 14 over areceive path such as path 36.

Each radio-frequency power amplifier (e.g., each power amplifier inpower amplifier circuitry 20) may include one or more power amplifierstages such as stages 22. As an example, each power amplifier may beused to handle a separate communications band and each such poweramplifier may have three series-connected power amplifier stages 22.Stages 22 may have power supply terminals such as terminals 24 thatreceive bias voltages. Bias voltage may be supplied to terminals 24using path 42. Control signals from storage and processing circuitry 16may be used to selectively enable and disable stages 22 using controlpath 44.

By enabling and disabling stages 22 selectively, the power amplifier maybe placed into different gain modes. For example, the power amplifiermay be placed into a high gain mode by enabling all three of poweramplifier stages 22 or may be placed into a low gain mode by enablingtwo of the power amplifier stages. Other configurations may be used ifdesired. For example, a very low gain mode may be supported by turningon only one of three gain stages or arrangements with more than threegain mode settings may be provided by selectively enabling othercombinations of gain stages (e.g., in power amplifiers with three ormore than three gains stages).

Device 10 may include adjustable power supply circuitry such as powersupply circuitry 38. Adjustable power supply circuitry 38 may becontrolled by control signals received over control path 40. The controlsignals may be provided to adjustable power supply circuitry 38 fromstorage and processing circuitry 16 or any other suitable controlcircuitry (e.g., circuitry implemented in baseband module 18, circuitryin transceiver circuits 14, etc.).

Storage and processing circuitry 16 may maintain a table of controlsettings or other stored information to be used in controlling powersupply circuitry 38. The table may include a list of bias voltages (Vccvalues) that are to be supplied by adjustable power supply circuitry 38.Based on the known operating conditions of circuitry 44 such as itscurrent transmission mode (a high gain mode or a low gain mode), thedesired output power value Pout to be produced by power amplifiercircuitry 20 (e.g., the output power from amplifier 20 as measured atoutput 30 of duplex filter 28), the desired transmit frequency, andbased on the values of the control settings in the table, storage andprocessing circuitry 16 may generate appropriate control signals on path40 (e.g., analog control voltages or digital control signals).

The control signals that are supplied by circuitry 16 on path 40 may beused to adjust the magnitude of the positive power supply voltage Vcc(sometimes referred to as the amplifier bias) that is provided to poweramplifier circuitry 20 and terminal 42 over path 42. These power supplyvoltage adjustments may be made during testing and during normaloperation of device 10.

Wireless communications circuitry in device 10 may be characterized bymetrics such as a wireless circuitry performance metric and a wirelesscircuitry power savings metric. The values of these metrics may vary asa function of supply voltage (e.g., the supply voltage Vcc that is fedto the power amplifier circuitry), as shown in FIG. 2. Increasing supplyvoltage Vcc may increase a wireless circuitry performance metric (e.g.,by improving ACLR), as indicated by curve 46. Increasing supply voltageVcc may, however, decrease the wireless circuitry power saving metric(e.g., by consuming more power), as indicated by dotted curve 48. Inthis scenario, an optimum supply voltage for use during normal operationmay exist that takes both metrics into account (e.g., an optimum supplyvoltage may exist that provides desirable levels for both metrics).

The performance of radio-frequency power amplifier circuitry 20 may, forexample, be characterized by a performance metric such as an adjacentchannel leakage ratio (ACLR). Power amplifier circuitry 20 may be usedto transmit wireless signals in a desired radio channel. The adjacentchannel leakage ratio is the ratio of out-of-channel power (e.g., anoutput power level of signals at frequencies outside of the desiredradio channel) to in-channel power (e.g., an output power level ofsignals within the desired radio channel).

The adjacent channel leakage ratio may be expressed in terms of decibelsrelative to carrier (in-channel) signals (dBc). The adjacent channelleakage ratio expressed using dBc may be calculated by evaluating tenmultiplied by the base-ten logarithm of the ratio of the relevant powerlevels. For example, consider a scenario in which the out-of-channelpower level is 10 uW and the in-channel carrier power level is 100 mW.The adjacent channel leakage ratio is therefore −40 dBc (10*log₁₀(0.01÷100)).

Consider another scenario in which the out-of-channel power level is 1uW and the in-channel carrier power level is 100 mW. The adjacentchannel leakage ratio in this situation is −50 dBc (10*log₁₀(0.001÷100)).

It is desirable to have good out-of-channel rejection (i.e., a smalladjacent channel leakage ratio). It may therefore be desirable to obtaina more negative adjacent channel leakage ratio when expressed in termsof dBc, because taking the logarithm of a smaller ratio produces a morenegative result.

An ACLR margin value may be calculated based on the adjacent channelleakage ratio. ACLR margin may be defined as a target adjacent channelleakage ratio minus a measured adjacent channel leakage ratio, as shownin equation 1.

ACLR Margin=ACLR_(TARG)−ACLR_(MEAS)  (1)

The target ACLR is set according to design criteria (e.g., a designspecification). The target ACLR may, for example, be −40 dB. In thescenario above in which the measured ACLR is −40 dBc, the ACLR margin iszero (−40 minus −40). In the scenario above in which the measured ACLRis −50 dBc, the ACLR margin is 10 dB (−40 minus −50). In general, ahigher or more positive ACLR margin is more desirable.

In general, ACLR margin increases with supply voltage Vcc, as shown inFIG. 3. Curves 50, 52, and 54 of FIG. 3 represent ACLR margincharacteristics for power amplifier circuitry 20 of FIG. 1 operating atrespective output power levels of P1, P2, and P3. The output powerlevels may be expressed in terms of dBm (power relative to 1 mW in unitsof decibels). For example, power levels P1, P2, and P3 may be 10 dBm, 14dBm, and 20 dBm, respectively.

Curves 50, 52, and 54 may characterize power amplifier circuitry 20 whenoperating in a given gain mode (e.g., a low gain mode or a high gainmode). In general, when circuitry 20 is transmitting signals at higherpower levels at a fixed gain mode, circuitry 20 will experience morestrain and therefore exhibit degraded linearity or lower ACLR margin. Asa result, curve 52 may have lower ACLR margin values at each supplyvoltage level in comparison to curve 50. Similarly, curve 54 may exhibitlower ACLR margin at each voltage Vcc in comparison to curve 52.

Power supply circuitry 38 may supply current Icc to power amplifiercircuitry 20 over path 42 (see, e.g., FIG. 1). Supply current Iccincreases with supply voltage Vcc, as shown in FIG. 4. Curves 56, 58,and 60 represent characteristics curves for power amplifier circuitry 20of FIG. 1 operating at respective output power levels of P1, P2, and P3.Power levels P1, P2, and P3 may be 12 dBm, 16 dBm, and 24 dBm (asexamples).

Curves 56, 58, and 60 may represent power amplifier circuitry 20operating in a particular gain mode. Circuitry 20 that is transmittingsignals at higher power levels at a fixed gain mode will consume morecurrent. As a result, curve 56 may exhibit lower supply current valuesat each supply voltage level in comparison to curve 58. Similarly, curve58 may have lower supply current levels at each voltage Vcc incomparison to curve 60. It would be desirable to bias circuitry 20 atlower supply voltage levels if power consumption were a primary concern,because a lower supply voltage consumes less current and therefore lesspower.

From a performance perspective, it is desirable to operate the poweramplifier circuitry at higher supply voltages (see, e.g., FIG. 3). Froma power savings perspective, it is desirable to operate the poweramplifier circuitry at lower supply voltages (see, e.g., FIG. 4). Duringdevice characterization, an optimum supply voltage for biasing the poweramplifier circuitry can be determined. The optimum supply voltage takesboth metrics (e.g., ACLR margin and supply current Icc) into account.

A combined metric may be calculated from these two metrics. The combinedmetric may be referred to as a cost function. The cost function may becalculated by taking the product of the ACLR margin raised to a power kand a current savings ratio raised to a power j, as shown in equation 2.

Cost Function=(ACLR Margin)^(k)*[(I _(MEAS) −I _(MAX))/I_(MAX)]^(j)  (2)

The first product term (ACLR Margin raised to the k^(th) power) mayrepresent the power performance metric while the second product term(the current savings ratio raised to the j^(th) power) may represent thepower saving metric. The current savings ratio is determined bysubtracting a maximum supply current I_(MAX) from a measured currentI_(MEAS) and then dividing that difference by the maximum supplycurrent. Currents I_(MEAS) and I_(MAX) represent currents that are fedto circuitry 20 over path 42 (FIG. 1).

For example, current I_(MAX) represents the maximum current that is fedto the power amplifier circuitry operating at a maximum supply voltage(e.g., maximum Vcc). Current I_(MEAS) represents the actual measuredcurrent that flows through the power amplifier circuitry biased at agiven supply voltage that is lower than the maximum supply voltage. Thecurrent savings ratio has a negative value, because subtracting themaximum supply current from the measured current will yield a negativevalue. Exponents k and j have values such as 1, 2, more than 2, lessthan 2, etc.

As described in connection with FIG. 3, a higher (i.e., more positive)ACLR margin is more desirable. According to equation 2, a more negativecurrent savings ratio is more desirable, because reducing currentI_(MEAS) lowers power consumption. Because the cost function is definedas the product of the ACLR margin and the current savings ratio, a morenegative cost function may be desirable. In scenarios in which themeasured ACLR is greater than the target ACLR, ACLR margin would benegative, resulting in an overall positive cost function. A positivecost function is generally undesirable, because it indicates that thepower amplifier circuitry is exhibiting an adjacent channel leakageratio that does not meet design criteria.

Values may be selected for exponents k and j that place more weight(emphasis) on one of the metrics than the other. For example, in designRF power amplifier circuitry that requires more linearity, exponent kmay be set to two and exponent j may be set to one to put more emphasison ACLR margin. When designing power amplifier circuitry that requireslow power consumption, exponent j may be set to three and exponent k maybe set to one (as an example). Exponents j and k may have other valuesto implement other suitable weighting schemes, if desired.

FIG. 5 plots the cost function (see, e.g., equation 2) versus supplyvoltage Vcc for the power amplifier circuitry at various operatingconditions. For example, curves 62 and 64 may represent cost functioncharacteristic curves for the power amplifier circuitry operating in thelow gain mode with output power levels of 10 dBm and 12 dBm,respectively.

Curves 62 and 64 may be measured at a relatively low supply voltagerange (e.g., 200 mV to 320 mV), because the output power level of 10 dBmand 12 dBm can be achieved at relatively low supply voltages levels.Curves 64 may have relatively worse (i.e., higher) cost function levelsthan curves 62, because outputting signals at a higher power level inthe low gain mode places the power amplifier circuitry under morestrain, thus degrading ACLR and increasing the cost function. The ACLRof curves 64 may be degraded so that ACLR margin becomes positive,resulting in positive cost function levels. In contrast, curves 62 mayexhibit negative cost function values, indicating that the measured ACLRis at least below the target ACLR.

Curves 66 may represent cost function characteristics for the poweramplifier circuitry operating in the high gain mode with an output powerlevel of 14 dBm. Curves 66 may be measured at the low supply voltagerange (e.g., 200 mV to 320 mV). Curves 66 may exhibit relatively better(i.e., more negative) cost function levels than curves 64, becausecurves 66 is obtained in the high gain mode instead of the low gain modeused to obtain curves 64. Even though curves 66 represent a higheroutput level of 14 dBm in comparison to curves 64, the power amplifiercircuitry operating in the high gain mode places the individual poweramplifier stages under less strain, resulting in improved ACLR margin ora more negative cost function (see, e.g., FIG. 5).

Curves 68 may represent cost function characteristic curves for thepower amplifier circuitry operating in the high gain mode with an outputpower level of 24 dBm (as an example). Curves 68 may be measured at arelatively higher supply voltage range (e.g., 500 mV to 650 mV), becausethe output power level of 24 dBm may be achieved at relatively highersupply voltages. Portions of curves 68 exhibit positive cost functionlevels, indicating that the power amplifier circuitry is placed undersufficient strain.

Each respective curve in each set of characteristic curves may representa different power amplifier circuitry characteristic measured from arespective electronic device under test (DUT) that is tested under aparticular transmit setting (e.g., each DUT is tested while operatingunder a same output power level, frequency, etc.). Each respective curvemeasured from each DUT varies from one another due to random processvariations. For example, a hundred DUTs may be tested individually toobtain a hundred corresponding curves. The measured curves for each setof transmit settings may be averaged to compute an average cost functioncharacteristic curve. For example, highlighted curve 61 represents thecomputed average cost function curve for curves 62, highlighted curve 63represents the computed average cost function curve for curves 64,highlighted curve 65 represents the computed average cost function curvefor curves 66, and highlighted curve 67 represents the computed averagecost function curve for curves 68. The optimized settings loaded intodevice 10 may be calculated based on the average cost function curves.Optimized settings determined in this way may therefore be referred toas cost-function-derived optimized settings.

During device characterization operations, a set of characteristiccurves (e.g., curves 62, 64, 66, 68, etc.) may be obtained for poweramplifier circuitry in a variety of operating conditions. Characteristiccurves may be measured when devices are operating in different gainmodes, at different supply voltage levels, at different frequency ranges(e.g., different radio channels), at different output power levels, etc.These characteristic curves are often U-shaped curves that have aminimum point (e.g., a point corresponding to the most negative costfunction value). This minimum point may represent an operating pointthat provides a desired balance between ACLR margin and power saving.During normal operation, it may be desirable to bias the power amplifiercircuitry with an optimum voltage supply level that corresponds to theminimum point of the average cost function curve to obtain the minimumcost function. This type of statistical analysis may provide each devicewith cost-function-derived optimized settings that take into accountboth amplifier performance and power savings. With one suitablearrangement, each device that is produced may be provided withinformation (e.g., a stored table) that allows that device to operate atthe optimum level during use by a user.

In test system 69, device under test (DUT) 10′ may be connected to testequipment 71 during device characterization, as shown in FIG. 6.Multiple DUTs 10′ may be tested under each operating setting (e.g., ineach gain mode, at each supply voltage level, at each frequency setting,at each output power levels, etc.) to obtain different sets ofcharacteristic cost function curves. A hundred, a thousand, or anydesired number of devices may be tested for each operating setting (asan example).

An average cost function curve may be determined for each set of curves.The amplifier bias voltage that corresponds to the minimum point of eachaverage cost function curve may be stored in a table of optimizedsettings. For example, the table of cost-function-derived optimizedsettings may include an optimum supply voltage Vcc (i.e., a bias voltagelevel that is used to bias the power amplifier circuitry) that isoptimized for a device operating in high gain mode at 12 dBm outputpower level at 900 MHz.

During manufacturing processes, the table of optimized settings may beloaded onto device 10. The optimized settings may be stored on storageand processing circuitry 16, as shown in FIG. 6. Device 10 may be usedby a user to provide wireless communications in a wireless network.

FIG. 7 shows steps involved in testing an illustrative electronic devicewith power amplifier circuitry. At step 70, a user may select a givenelectronic device to be a device under test (DUT). A device baselinecurrent may be measured (step 72). The baseline current may be the totalcurrent supplied to the device under test when the power amplifiercircuitry is inactive (e.g., turned off or unpowered).

At step 74, test equipment (e.g., test equipment 71 as shown in FIG. 6)that is connected to the device may direct the CUT to operate in aspecific frequency band (step 74). The test equipment may further directthe device to be tuned to a desired radio channel for testing (step 76).

At step 78, the test equipment may direct the power supply circuitry tosupply the power amplifier circuitry with a desired supply voltage. Thetest equipment may then direct the power amplifier circuitry to outputsignals at a requested output power level (step 80).

At step 82, the test equipment may measure the actual output powerlevel, the ACLR, and the total current flowing through the DUT. Thebaseline current may be subtracted from the total current to determinethe supply current Icc flowing through the power amplifier circuitry.

Obtaining the output power level, ACLR, and current Icc in this wayproduces a data point for the cost function plot. Processing may loopback to step 80 to measure additional output power levels, as indicatedby path 84. Processing may loop back to step 78 to measure additionalsupply voltage levels, as indicated by path 86. Processing may loop backto step 76 to test additional radio channels, as indicated by path 88.Processing may loop back to step 74 to test additional frequency bands,as indicated by path 90. Processing may loop back to step 70 if it isdesired to test additional devices, as indicated by path 92.

Once sufficient data is collected, cost functions corresponding to theDUTs that have been measured may be computed (step 94). At step 96,optimum control settings may be identified by locating the minimum pointon each cost function characteristic curve. During manufacturing, eachminimum point corresponding to respective operating conditions may beloaded onto a device (step 98). For example, a table ofcost-function-derived optimized settings may be loaded onto each device.The table of optimized settings may include optimum power amplifiercircuitry bias voltage levels that correspond to each operatingcondition (e.g., in each gain mode, at each supply voltage level, ateach frequency setting, at each output power levels, etc.).

At step 100, a device that has been provided with these optimizedsettings may operate in accordance with the optimum control settings(e.g., by selecting the optimal supply voltage to bias the poweramplifier circuitry) depending on the operating conditions of thedevice.

The foregoing is merely illustrative of the principles of this inventionand various modifications can be made by those skilled in the artwithout departing from the scope and spirit of the invention.

1. Wireless communications circuitry on an electronic device,comprising: radio-frequency power amplifier circuitry that amplifiesradio-frequency signals that are transmitted from the electronic device;adjustable power supply circuitry that supplies an adjustable powersupply voltage to the radio-frequency power amplifier circuitry; andstorage and processing circuitry that is configured to storecost-function-derived optimum operating settings for the radio-frequencypower amplifier circuitry and that is configured to use thecost-function-derived optimum operating settings in adjusting theadjustable power supply circuitry to supply the adjustable power supplyvoltage.
 2. The wireless communications circuitry defined in claim 1,wherein the storage and processing circuitry is configured to storecost-function-derived optimum operating settings that are produced by anaverage cost function that is based on a performance metric and a powersaving metric.
 3. The wireless communications circuitry defined in claim1, wherein the storage and processing circuitry is configured to storecost-function-derived optimum operating settings that are produced by anaverage cost function that is based on adjacent channel leakage ratioand a power saving metric and wherein the adjacent channel leakage ratiois raised to a given exponent value.
 4. The wireless communicationscircuitry defined in claim 1, wherein the storage and processingcircuitry is configured to store cost-function-derived optimum operatingsettings that are produced by an average cost function that is based ona performance metric and a current savings ratio and wherein the currentsavings ratio is raised to a given exponent value.
 5. The wirelesscommunications circuitry defined in claim 1, wherein the storage andprocessing circuitry is configured to store cost-function-derivedoptimum operating settings that are produced by an average cost functionthat is based on adjacent channel leakage ratio and a current savingsratio, wherein the adjacent channel leakage ratio is raised to a firstexponent value and wherein the current savings ratio is raised to asecond exponent value, and wherein the second exponent value isdifferent from the first exponent value.
 6. The wireless communicationscircuitry defined in claim 1, wherein the storage and processingcircuitry is configured to store cost-function-derived optimum operatingsettings that are produced by an average cost function that is based onadjacent channel leakage ratio and a current savings ratio, wherein theadjacent channel leakage ratio is raised to a given exponent value, andwherein the current savings ratio is raised to the given exponent value.7. A method of testing a plurality of wireless electronic devices havingstorage and processing circuitry and power amplifier circuitry,comprising: with the storage and processing circuitry of each wirelesselectronic device, configuring that wireless electronic device tooperate under a given operating condition; with test equipment,measuring a performance metric of the power amplifier circuitry for eachwireless electronic device while that wireless electronic device isoperating under the given operating condition; with the test equipment,measuring a power saving metric of the power amplifier circuitry foreach wireless electronic device while that wireless electronic device isoperating under the given operating condition; and with the testequipment, computing a cost function value for each wireless electronicdevice by taking a product of the performance metric and the powersaving metric for that wireless electronic device.
 8. The method definedin claim 7, wherein configuring each wireless electronic device tooperate under the given operating condition comprises: configuring thatwireless electronic device to transmit wireless signals with the poweramplifier circuitry at a common output power level using a given gainmode.
 9. The method defined in claim 8, wherein measuring theperformance metric of the power amplifier circuitry comprises measuringan adjacent channel leakage ratio.
 10. The method defined in claim 9,wherein measuring the power saving metric of the power amplifiercircuitry for each wireless electronic device comprises: measuring abaseline current for that wireless electronic device while the poweramplifier circuitry for that wireless electronic device is turned off;and measuring a total supply current for that wireless electronic devicewhile the power amplifier circuitry for that wireless electronic deviceis turned on.
 11. The method defined in claim 10, wherein computing thecost function further comprises: raising the adjacent channel leakageratio to a first exponent value to obtain the performance metric;computing a current savings ratio based on the baseline current and thetotal supply current; and raising the current savings ratio to a secondexponent value to obtain the power saving metric.
 12. The method definedin claim 11, further comprising: with the test equipment, computing anaverage cost function characteristic curve based on the cost functionvalues measured from the plurality of wireless electronic devices. 13.The method defined in claim 12, further comprising: with the testequipment, determining an optimum power amplifier bias voltage levelthat corresponds to a minimum point on the average cost functioncharacteristic curve.
 14. The method defined in claim 13, furthercomprising: with the test equipment, storing the optimum power amplifierbias voltage level in a table of cost-function-derived optimizedsettings.
 15. The method defined in claim 14, further comprising: withthe test equipment, obtaining additional optimum power amplifier biasvoltage levels by testing each of the wireless electronic devices atadditional output power levels; and with the test equipment, storing theadditional optimum power amplifier bias voltage levels in the table ofcost-function-derived optimized settings.
 16. A method of operating awireless electronic device having storage and processing circuitry andpower amplifier circuitry, comprising: during operation of the wirelesselectronic device in a wireless network, retrievingcost-function-derived optimum bias voltage settings stored on thestorage and processing circuitry; with adjustable power supplycircuitry, biasing the power amplifier circuitry with an adjustablepower supply voltage; and with the storage and processing circuitry,adjusting the adjustable power supply circuitry to supply the adjustablepower supply voltage based on the cost-function-derived optimum biasvoltage settings.
 17. The method defined in claim 16, wherein thewireless electronic device operates at a given output power level andwherein biasing the power amplifier circuitry comprises: with theadjustable power supply voltage, providing the power amplifier circuitrywith a cost-function-derived optimum bias voltage that corresponds tothe given output power level.
 18. The method defined in claim 17,wherein the wireless electronic device operates using at least a givengain mode and wherein the cost-function-derived optimum bias voltagecorresponds to the given gain mode.
 19. The method defined in claim 16,wherein the wireless electronic device operates in a given gain mode andwherein biasing the power amplifier circuitry comprises: with theadjustable power supply voltage, providing the power amplifier circuitrywith a cost-function-derived optimum bias voltage that corresponds tothe given gain mode.
 20. The method defined in claim 16, wherein thewireless electronic device operates at a given operating frequency andwherein biasing the power amplifier circuitry comprises: with theadjustable power supply voltage, providing the power amplifier circuitrywith a cost-function-derived optimum bias voltage that corresponds tothe given operating frequency.